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Click here or scroll down to respond to this candidateCandidate's Name
Street Address phone: PHONE NUMBER AVAILABLEEMAIL AVAILABLEExperienced in all phases of new product development and technical management from theconceptual stages to production release. Experienced in designing complex electronics hardwareincluding digital and analog circuits, as well as FPGAs using VHDL, embedded software, C, C++,Python, Android APP development in base of Java, signal integrity, timing budget, simulation,high-speed PCB layout design, hardware debug and testing, image processing/compressing,Bluetooth implementation, sensors fusing, EMI/EMC compliance, manufacturability.CAREER PLANBecome Electronics HW designer, Electronics Hardware development manager, Engineeringmanager, Technical director,WORK EXPERIENCEAlstom, Melbourne, FL July 2021 August 2024Electronics HW Architect,Defined the hardware architecture, to include:Defined the functional and structural breakdown into hardware components,Allocated the requirements to the components, defined the interfaces between thehardware components,Defined the dynamic behavior of the hardware, and validated the feasibility of thesolution through model simulation and/or prototyping.Defined main technical decisions for hardware development, defined the hardware interfacesfor the softwarePerformed both analog and digital circuit design/analysis and product validationParticipated in the development of the full-bridge inverter.FPGA designDeveloped detailed specifications based on requirements and implemented FPGAdesigns to those defined requirements and/or specifications.Performed simulation activities including timing analysis and behavioral, andfunctional simulations.Developed test benches and other test tools as needed to complete verification ofFPGA designs.Participated in the bring-up of new, custom FPGA-based hardware with support fromfirmware and electrical engineers.Because of my contribution in the early weeks from the starting day, the companysaved 1,000,000+ USD.Rail crossing control device firmware designed.Performed real-time testing and troubleshooting of mixed-signal PCB assemblies.Defined the production test needs and strategyPrepared and performed hardware requirements tests, integration tests, and verifications ofdeliverables.Led regulatory and customer-mandated EMI/EMC compliance testing and troubleshooting.Designed schematics and PCB layout by using PADS.Tested circuits.The following Design tools were used:Mentor Graphics PADS for schematics and PCB layout designAltera FPGA IDE QuartusXilinx FPGA IDE ISELattice Semiconductor FPGA DiamondPerformed a Simulation in the toolsTINA-TI Simulation toolLTspice Simulation toolModelsim HDL simulatorBeckwith Electric Co., Inc. / Hubbell Inc. Largo, FL February 2018 July 2021Principal Electrical Design Engineer / Staff Design EngineerDesigned analog accusation module (with the isolated amplifiers and AD converter) withthe error and noise budget consideration.Designed analog loop module, which includes Analog and digital, Surge and ESD protectioncircuits, by using Altium EDA.Designed battery interface module, which includes Analog (with the analog signalconditioning and current measurement differential amplifier) and digital, Surge, and ESDprotection circuits, by using Altium EDA.Provided design solutions to be able to pass surge tests and functional tests for the Arc Flashmodule.Prepared a plan and discussed with the lab vendor for the testing of the Arc Flash protectionmodule in real Arc Flash events.Prepared the type test specification for the Arc flash protection device.Prepared customer documentation for the Arc Flash protection module.Provided design solutions to be able to pass the 6KV surge test per IEEE C62-41.2 standard.Provided design solutions for one of the products to decrease the number of components bythe implementation of the FPGA and ARM MCUs and provided presentations to themanagement.Providing DFMA for the existing and new designs.Provided troubleshooting guidelines for the long-lasting Blackfin DSP booting issue at lowtemperatures.Multiple signal integrity issues (in existing products) were resolved.Participated in the IEEE C37.60 testing of the one of existing products.Designed and directed high-speed schematics and PCB layout in Altium with considerationof Grounding, Noise cancellation, EMC, EMI, and ESD.Tested of the circuits.Performed a Simulation in the toolsTINA-TI Simulation toolLTspice Simulation toolTo improve the electronics HW development process the following documents were createdand presented to the management:HW module design specification.HW module testing (including type tests, functional tests, production tests, andimplementation testing) specification.HW module development and maintenance checklist.HW module development and maintenance history.HW design practice.HW design guideline.Organized a workshop and presentation for the engineering team:Arrow: Intel (Altera), Microsemi, Lattice FPGA and SoC, and theirimplementationSiemens(Mentor Graphics): IHyperlynx SI and PI tools and their implementationArrow: STmicro ASTM32H7 family ARM MCUsArrow: New power supply modules from the Analog devices.Kinectricks lab: Arc Flash protection devise testing in the high current lab.ABB Ltd, Lake Mary, FL April 2010 - February 2018Lead HW engineer/Hardware development Team leader/Line ManagerManagementManaged (as Hands-on manager) (more than 5 years) the team consisting of tenteam members (six electrical engineers, two mechanical engineers, and two testengineers)Coordinated the globally diverse teams.Coordinated between other entities of the company, like customer and productionsupport, and sales/marketing.Hardware development and support activity:Developed and updated operating procedures and work Instructions for the: Designfor Manufacturability; Design for Testability; Design for Reliability; Failure ModeEffect Analysis; Worst case analyses; Tolerance analyses; and hardwaredevelopment life cycle methodology (MileStone process).Directed and verified the EMC/EMI/ESD compliance, Environmental, Mechanical,and Safety tests according to UL, IEC, and ANSI standards for Electrical/Electronicproducts.Conducted design reviews, not limited to schematics, PCB layout, test procedures,and cost analysis.Organized workshops/presentations by the electronics manufacturer vendors.Organized workshops/presentations by the design tool vendors. In the results of suchworkshop, we implemented not limited to Signal/power integrity simulation toolsfrom the Mentor graphic.Provided the searching, analyzing, creating, and protecting intellectual properties.Supported production for the customer issue, resolving EOL issues for theelectronics components. Coordinated engineering activities with purchasing andmanufacturing.Provided job training for new hires, customer service, and production personnel.Provided a coordination meeting with other departments outside the USA.Reverse engineering performed for competitor product analyses.Technical activities provided:Architecture Design: Evaluated ideas for new products and suggested systemconcepts for the implementation of the products. Worked closely with the project andproduct managers to generate product Technical Requirement Specifications (TRS).TRS included, not limited to: electrical, software, interface, mechanical,environmental, EMI/EMC, compliance to UL, ANSI, and IEC standards, cost,materials, manufacturability, and testing (including production) requirements.Circuit Design: Designed Analog (with the signal conditioning, isolated amplifiers,analog front ends, and AD converter) /Digital circuits, including microcontrollersand FPGAs. Worst case, tolerance, reliability, stress, thermal, and cost analyses wereperformed. Material selection is performed by working closely with the SCMdepartment. Conducted simulations. Generated and updated design documentation.PCB layout: Designed and directed PCB layout design. Conducted HyperlynxSignal/Power integrity simulation, and signal integrity DRC on the PCB layout filesbefore going to PCB production. Conducted Design for manufacturability, testability,thermal, mechanical stress analyses, and component reliability.Documentation: Generated/updated all design documentation, not limited to designtechnical documents, design descriptions, analysis reports, and production testspecifications.Production: Realized design and documents to the production.The following Design tools were used:Mentor Graphics PADS for schematics and PCB layout designAltera FPGA IDE QuartusXilinx FPGA IDE ISEXilinx FPGA VivadoMicrosemi FPGA IDE LiberoTested circuits.Performed a Simulation in the toolsOrCAD PSpice Circuit SimulationTINA-TI Simulation toolLTspice Simulation toolMentor Graphics Hyperlynx Signal integrityMentor Graphics Hyperlynx Power integrityMentor Graphics Hyperlynx Signal integrity DRC tollModelsim HDL simulatorProduct designed:Released into production:Integrated Switch Device (ISD) for control of magnetic actuator-basedmechanismsUniversal Power Driver (UPD) to operate re-closersUninterruptible Power Supply (UPS) for control IEDs of the re-closersSensor Input Module (SIM) measures voltage from the power protectionsystemREF615R for retrofitting the legacy protection relaysReleased as a prototype:High Speed Output moduleSpimeLoad Control Technologies, King Of Prussia, PA April 2008 April 2010Senior Electronics EngineerDeveloped Load measurement (using acoustics signals from transducer) portable device forBoeing: developed digital (with the FPGA and microcontroller)/analog (with the signalcondition circuits and DA converter) hardware, switching power supplies, image processingVHDL code, firmware for Bar Code reading subsystem, which includes camera chip,NTSC/PAL/SECAM to YCbCr video decoder from Analog devices, ProASIC3 family flashFPGA from Actel, Renesas 32-Bit RISC Microcontroller SH7211, SRAM.Developed hardware interface system, with implementing reverse engineering, between theLoad measurement device and Atlas-Copco torque device. This system is implemented andrunning in the John Deer tractor factory.JPEG compression device by the implementation of Xilinx FPGAs.Developed an automation system involving motion control devices from Trio, IMS, and lasersensors from Banner.Developed Load measurement devices implemented for Boeing.Designed, supported, and directed a PCB layout in ORCAD.Tested circuits.Performed the Simulation with toolsOrCAD PSpice Circuit Simulation tool.Modelsim HDL simulatorDirected engineering activities.Provided manufacturing support.L-3 Communications, Bristol, PA Aug. 2002 to March 2008Senior Hardware/Software design engineer in the telecommunications areaParticipated in developing embedded software for ISUP.Designed embedded software for IVR applications.Provided field support, SS7 implementation, support, testing.Participated in developing hardware of the Subscriber line cards.Designed the Radio Subscriber Unit's modem part. Used FPGA Spartan3, ARM9, differentDAC and ADC, FLASH, DRAM, Ethernet PHY.Designed Transcoder, that compresses 16 E1 of 64kbit/sec PCM speech channels to 1 E1stream, and decompress 1 stream to 16 E1 channels. Used PowerPCs MPC8260, EthernetPHYs, Dual port RAM, Different Flash memories, SRAMs, DRAM, TI DSPsTMS320VC5410, PCM timeslot interchanger switch fabric, E1/T1 Framers, Altera MAX300Afamily CPLDs, Altera Cyclone and Acex family FPGAs, PLLs and clock distributors andothers.Designed and updated a PCB layout by using a tool PCAD.Tested circuits.Performed the Simulation in the toolsMentor Graphics Hyperlynx Signal Integrity.Modelsim HDL simulatorDesigned Video compression core in VHDL by using fast 9/7 Daubechies discrete directwavelet transformer (line-based).Designed a very efficient GSM protocol analyzer component in VHDL.ADDITIONAL PROJECTSDeveloped H.264 video compression core.JPEG/MJPEG core was redesigned by decreasing the system clock frequency from the8 times PIXEL CLOCK to 1 time PIXEL CLOCK.Developed AVR soft processor by implementation of the custom-made floating pointarithmetics cores.Implemented computer vision algorithms in FPGA for creating collision avoidance systems.Implemented an extended Kalman filter in FPGA.High-speed Digital data logger designed on base Lattice XP2 FPGA LAXP2-5E-5TN144E.Designed VHDL components for:o NAND Flash memory interfaceo I2C interfaceo SCCB interfaceDesigned fixed point arithmetic components for:o Sine functiono Arctan by using the CORDIC algorithmo PIDDesigned floating point mathematical operations cores per 32-bit single-precision IEEE 754standard.Implemented Silicon Labs Bluetooth Low Energy modules.EXPERTISE AND SKILLSEngineering managementReverse engineeringDigital circuit designAnalog circuit designFPGA design by VHDL, VerilogHardware schematics and PCB layout design tools: PCAD, PADS, ORCAD, Eagle, Altium.FPGA design tools: Modelsim, Xilinx ISE/Vivado, Altera Quartus, Actel Libero IDE, LatticeDiamond, Lattice Radiant.Simulation tools: Mentor HyperLynx, Mentor DRC, OrCad PSPICEImage processingImage compressionSensors interfacingEMC engineeringSignal Integrity engineeringProgramming language. CMicrosoft Visual BasicMicrosoft Visual C++PythonAndroid App Development in the base of JAVAEmbedded programmingBluetooth Low EnergyANSI/IEC Standards knowledgeType testingPCB design and directingMechanical designProduction supportMaintenanceTechnical documentationMultilanguage: English, Azeri, Turkish, Russian,EDUCATIONSPh.D. in Components and Devices computer and control systems.Institute of Cybernetics - Baku, AzerbaijanB.Sc. / M.Sc. in Electronic Engineering.Voronezh State Technical University- Voronezh, Russian FederationTRAINING:Maximize leadership abilityEMC for the power industryMebthor Graphics Hyperlynx SI trainingMebthor Graphics PADS trainingProject managementManagement Skills Development ProgramFundamentals of Solaris 7IP Routing and BridgingInternal Quality AuditsISO9001PROFESIONAL MEMBERSHIPIEEEESD assosiationPATENTS1. Patent US 9510475. Mechanical assembly and method to provide form-factor and wire-alikeadaptation of existing platform hardware modules into new products2. Patent US 9451719 U form-factor intelligent electronic device (IED) hardware platformwith the matching of IED wiring, from a non-U form-factor IED hardware platform usingadapter structurePUBLICATIONS1. Organization of Speech Control. Published in "Computer-aided control systems inconstruction industry".2. Hardware & Software complex to automate investigation of multidimensional objects.Proceedings of Scientific Conference on control systems.3. The system for recognition of speech signals. Proceedings of Scientific Conference oncontrol systems.4. An effective algorithm to construct standard words for speech recognition. Proceedingsof Scientific Conference on control systems.5. Other 8 publications covering topics such as speech recognition, acoustic diagnostics, etc.CITIZENSHIPUS citizen.DEVELOPED PRODUCTSThe picture of developed and released products is to be provided upon request. |
