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Jason (Shenchih) Tung, Ph.D. PHONE NUMBER AVAILABLEEMAIL AVAILABLEStreet Address
CareerSummaryI have progressed through various roles in my career, starting as an entry-level software engineer, advancing to hardware engineer, project manager, and ultimately serving as the Director of the Automation Department and COO of a startup company. Over the past 20 years, I have honed my ability to identify problems and learn and acquire the necessary skills and information to solve them effectively.No matter the position, I am confident in my ability to help solve the problems you are currently facing. U.S. Citizenship Ph.D. in Electrical and Computer Engineering. University of Pittsburgh, 2001-2008 Master in Telecommunication. University of Pittsburgh 1999-2000 Bachelor in Electrical Engineering. Nation Ocean Taiwan University 1993-1998 Expertise in1. FPGA Architecture  Xilinx / Vivado / Vitis2. FPGA design - VHDL/Verilog/Verification/System C 3. Software Development in C++, C#, Embedded C and Python 4. SW/HW Co-design5. Project Management6. Robotic/Automation: Copley motion control, ACS motion control, Triomotion control system, NanoTech motor/drive7. PLC control : GE Fanuc PLC system, Rockwell RSLogix 5000 PLC system Work Experience: FPGA Engineer and salesConcurrent EDA-Pittsburgh, PA January 2020 to January 2024 Primary responsibilities1. Establishing communication and initiating the project management for customers 2. Developing FPGA cores for MiniLED back plane for TV companies 3. Developing FPGA acceleration algorithms for 3D TV solution 4. Developing FPGA cores for HDMI video channels for customer 5. Developing customized serial communication in customized FPGA board for satellite communication Achievements1. Establishing 20+ international customers within a year 2. Delivering the MiniLED back plane FPGA TV TCON control to a customer in 6 months 3. Delivering HDMI video channel to customer in 3 months 4. Delivering customized serial communication to the customer in 3 months Chief Operations Officer (COO) / General ManagerUGOLED-Changzhou, November 2016 to September 2019 Primary responsibilities1. Building the factory including clean room, water treatment plant, and production line to develop a new high precision OLED mask2. Leading a sale team, and improving strategic plans for the company 3. Optimizing the sales and production efficiency4. Leading a software team to build ERP system5. Establishing the company's vision and reviewing company's goal Achievements1. Deliverying the factory in a year2. Reaching the break-even point within 3 years3. Achieving triple sales within 3 years4. Achieving ISO9001 CertificationDirector of Automation DepartmentUGOLED-Changzhou June 2017 to September 2019 Primary responsibilities1. Establishing and leading an automation team: Software/Hardware co-design 2. Developing an automatic precision alignment machine 3. Developing an automatic tension machine. Achievements - Delivered: Automatic precision alignment machine 1. Delivering the machine within 5 months2. Achieving 3~5 microns alignment accuracy3. Delivering Fast Alignment Proces with CCD system and image processing algorithm 4. Delivering Close-loop control containing motion-feedback-image processing modules Achievements - Delivered: Automatic tension machine 1. Achieving 5 microns tension accuracy2. Delivering 2D tension motion control3. Implementing 24 objects (grabbers) controlled simultaneously 4. Delivering Close-loop control containing motion-feedback-image processing modules Software Project ManagerAdvantech US-Pittsburgh, PA, March 2016 to November 2016 Primary responsibilities included1. Leading the team for software development2. Defining the software development plan and quality control tests 3. Communicating with customers for their needs and understanding their problems 4. Communicating with the mechanical team to perform high precision control system 5. Building software and automation control for a world-class tension machine 6. Building software and automation control for a world-class alignment system Achievements1. Delivering high-precision alignment machine under vacuum chamber 2. Alignment accuracy: +/- 2um3. Delivering high-precision tension machine4. Position accuracy: +/- 10umSoftware EngineerAdvantech US-Pittsburgh, PA January 2013 to March 2016 Primary responsibilities included1. Defining the software development plan and quality control tests 2. Communicating with the mechanical team to perform high precision control system 3. Building two large system: the high-precision alignment system and an intelligent tension machine in C and C#4. Maintaining and repair the vacuum control system 5. Maintaining the PLC control systems including robot arm control, sputter source motion control system6. Developing mask database for management7. Collecting deposition data for quality control8. Problems:9. Alignment accuracy within +/- 5um10. Tension position accuracy within 20um Achievements: delivering High-precision alignment system 1. Delivering a 7 axis motion control system for an auto-control module with communication module for complexing control system2. Delivering camera image processing modules to recognize alignment mark with high precision alignment error883. Delivering a user interface to provide user friendly interface to operate the system 4. Providing test and quality control plan to test the system. Achievements: delivering the intelligent software core for the alignment and tension control of the mask tension machine1. Developing a new alignment system for tension machine 2. Developing a gantry control program with (9+) axis for welding and vision control 3. Developing a multiple (20+) axis motor control system for tension Staff SW/HW EngineerIntrigue Technology-Pittsburgh, PA August 2009 to December 2012 Primary responsibilities and achievements1. Developing image-process front end module for commercial camera 2. Processing pixel data from CCD sensor, applying high-dynamic range algorithm, and providing video stream to the back-end module3. Developing digital signal process (DSP) cores in TI digital media (DM) processor for processing image algorithms to display high dynamic range image on camera 4. Optimizing DSP code to perform stream video5. Developing FPGA modules for video process for DDR memory module 6. Test and debug DSP code for DM processorStaff EngineerConcurrent EDA-Pittsburgh, PA, April 2008 to July 2009 Primary responsibilities - embedded camera system 1. Building a 4-camera system on Spartan3a FPGA platform 2. Building JPEG2000 interface on FPGA chip for the client 3. Developing embedded software in C on PowerPC to drive pixel data to the JPEG2000 interface and access compressed data4. Developing embedded system booting code in C on Intel on-board Flash memory 5. Building the audio transmission through Ethernet with TCP/UDP connection 6. Verifying PCB board and FPGA pin assignment Primary responsibilities- Intelligent Surveillance System 1. Building a PCB board connecting Virtex5 board and cameras 2. Developing and debug an embedded server program embedded in a client program 3. Developing data path in FPGA from camera to DDR2 memory controller based on the camera manufacturing specification and Xilinx memory specification. The data path includes pixel merge and Bayer decoderCOMPUTERSKILLS:Hardware Design: VHDL, Verilog, System CProgramming Language: .NET, C/C++/C#, VB,JAVAScript Language: JaveScript, Tcl, PerlDatabase: MySQLSignal Measurement Equipment: Platforms:Unix, Linux, Windows NT/2000/XPEDA tools:Mentor Graphics: ModelSim /PrecisionAltera: Quartus IIXilinx: ISE, EDK, Chipscope Pro, iMPACTPCB: Express PCB/SchematicSynplicity: Synplify ProSynopsys: Design Compiler, PrimePowerEDUCATION: Ph.D. in Electrical and Computer Engineering, University of Pittsburgh, 09/2001~04/2008.Certificate of Advanced Study in Telecommunications, University of Pittsburgh, 09/2000 ~ 08/2001Masters in Information Science in Telecommunications, University of Pittsburgh, 09/1998 ~ 08/2000Bachelors in Electrical Engineering, National Taiwan Ocean University, 07/1993 ~ 07/1997PUBLICATIONS: Chapters in Edited Books1. S. Tung, S. Dontharaju, L. Mats, P. J. Hawrylak, J. T. Cain, A. K. Jones, Layers of Security for Active RFID Tags, Chapter 31 in RFID Handbook: Applications, Technology, Security, and Privacy. S. Ahson and M. Ilyas, editors, Taylor and Francis. 2. S. Dontharaju, S. Tung, R. R. Hoare, J. T. Cain, A. K. Jones Design Automation for RFID Tags and Systems, Chapter 13 in RFID Handbook: Applications, Technology, Security, and Privacy, S. Ahson and M. Ilyas, editors, Taylor and Francis. 3. A. K. Jones, S. Tung, S. Dontharaju, P. J. Hawrylak, L. Mats, J. T. Cain, Minimum Energy/Power Considerations, Chapter 21 in RFID Handbook: Applications, Technology, Security, and Privacy. S. Ahson and M. Ilyas, editors, Taylor and Francis. Journals1. A. K. Jones, Shenchih Tung,  A Secure Transaction Methodology for the Passive Active RFID Tag (PART), IEEE Transactions on Automation Science and Engineering  To appear2. S. Dontharaju and Shenchih Tung and Alex K. Jones and Leonid Mats and Justin Panuski and James T. Cain and Marlin H. Mickle, The Unwinding of a Protocol, IEEE Applications and Practice Communications Magazine, Vol.1, No.1, April 2007, pp. 4-10. 3. A. K. Jones, R. Hoare, S. R. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J. T. Cain, M. H. Mickle, An Automated, FPGA-based Reconfigurable, Low-power RFID Tag, Special Issue on FPGA-based Reconfigurable Computing, Journal of Microprocessors and Microsystems, Vol 31, No. 2, March 2007, pp. 116-134 4. A. K. Jones, S. Dontharaju, S. Tung, P. Hawrylak, L. Mats, R. Hoare, J. T. Cain and M. H. Mickle, Passive Active Radio Frequency Identification Tags (PART), International Journal of Radio Frequency Identification Technology and Applications, Vol.1, No. 1, 2006, pp. 52-73.5. A. K. Jones, S. Dontharaju, S. Tung, L. Mats, P. Hawrylak, R. R. Hoare, J. T. Cain, and M. H. Mickle, Radio Frequency Identification Prototyping, ACM Transactions on Design Automation for Electronic Systems (TODAES) - in review since September 2006. 6. R. Hoare, A. K. Jones, D. Kusic, J. Fazekas, J. Foster, S. Tung, M. McCloud, Rapid VLIW Processor Customization For Signal Processing Applications Using Combinational Hardware Functions, EURASIP Journal on Applied Signal Processing, Vol. 2006, Article ID 46473, 2006, pp. 1-237. P. J. Hawrylak, L. Mats, J. T. Cain, A. K. Jones, S. Tung, M. H. Mickle, Ultra Low- power Computing Systems for Wireless Devices, International Review on Computers and Software (IRECOS), Vol. 1, No. 1, July 2006, pp. 1-10. 8. R. Hoare, Z. Ding, S. Tung and R. Melhem, A Framework for the Design, Synthesis and Cycle-Accurate Simulation of Multiprocessor Networks, Journal of Parallel and Distributed Computing (JPDC), Vol. 65, No. 10, October 2005, pp. 1237-1252 PATENT: 1. Patent Title: METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION OF AN ACTIVE TRANSPONDERPittsburgh Reference No.: 01056 ESCMDocket No.: PHONE NUMBER AVAILABLEU.S. Continuation-in-Part Patent Application Serial No. 11/561,595 Filed: 11/20/2006 Inventors: Marlin H. Mickle, Tom Cain, Ray Hoare, Alex Jones, Shenchih Tung, Peter Hawrylak, Chuba OyolLANGUAGEAdvanced understanding in English, Chinese (Native Speaker).