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Home: PHONE NUMBER AVAILABLE OR PHONE NUMBER AVAILABLEEmail: EMAIL AVAILABLEObjective: Seeking gainful employment in either the service industry or technical field. Capable Positions: Applications Engineer or Manager / Engineering, Applications, or Operations Manager / Site Manager / Regional Manager, VP, or Director of Engineering, ERP (Enterprise Resource Planning).Skills: Management, Procurement, Line Queueing, CAD Floor layouts/Design, Budgeting and Allocation (2 million Capital Budget), Applications of High Tech Machinery, Planning and Project Management, Cost Reduction, Quality Improvement, Kaizen, 6S, KanBan & MfgTheories. Statistical Analysis.MOST RECENT WORK EXPRIENCE2009-2016: Personally Invested all time Watching over and Caring for Disabled, Elderly Parents.2017 2019: Part time Job at UPS and Various Temporary Employment and Staffing Agencies2020 2021: FED EX Distribution, Truck Loader, Feb 10, 2020 to August 20212021 2022: SECURITAS April 2021 through October 2022Education: B.S. Ceramic EngineeringUniversity of Illinois (at Urbana-Champaign) 1988GPA: major 4.8 / 5.0 cumulative 4.45 / 5.0Completed four-year program in three yearsExperience: Fabtech, Inc. (Diodes) 03/04 02/09Lees Summit, MO 64086Project Manager / Engineer 04/07 02/09Implemented a new product capital expansion plan ($8M). Improved the equipment utilization in key bottleneck areas, including redesign of area layouts. Implemented system wide processes for improvements in cycle time, productivity, and other Key Performance Indicators.Implemented dual purpose expansion plan to introduce pilot line for a new product introduction and the introduction of 6 inch wafers, increasing available capacity by 20%.Redesigned Fabrication layout to improve product quality and workflow of product.Strategically addressed single machine process so a backup tool was available including, conversions of some tools back and forth between 5 and 6 inch wafers.Increased Test output by 10% through layout redesign, eliminating unnecessary walking.Successfully negotiated two metallization machines for the price of one, eliminating major implementation design flaw of preceding plan.Developed contract performance measures tied to delivery, quality and price to improve the overall implementation schedule, budget and plan using ERP for the project and project mgmt..Assistant Operations Manager / Manufacturing Manager 06/05 04/07Responsible for 4 shift 24/7 semiconductor operation including 130 indirect reports and 5 supervisors. Responsible for improvement of production volume from 36K wafer operation to 54K wafer operation through lean manufacturing enhancements. Increased productivity by 25%. Responsible for performance indices as well as planning for operational improvements.Coached and Mentored supervisors and engineers to develop Kan Bans and improve cycle time of metallization, diffusion, test, thinning and photolithography areas.Developed critical metal target utilization plans to optimize metallization performance.Planned and anticipated staffing levels to promote productivity and fluctuations in sales plans. Responsible for hiring, firing and performance reviews for 135 people.Developed training plan for supervisory personnel from operations level to supervisory and superintendent level.Responsible for operational workforce development and training plan. Emphasized cross-training for improved performance.Developed several options for operational employee career paths enabling promotion, pay raises and cross training opportunities to improve employee retention.Developed and implemented employee performance bonus plan which increased productivity 10%.Emphasized documentation at supervisory level and coaching for improved team performance.Engineering Manager 11/04 06/05Responsible for the sustaining engineering organization for the fabrication facility. Involved in driving key projects vital to company growth including a $2 million capital budget and cost reductions of raw materials usage by 10%. Responsible for 9 direct engineering reports.Responsible for integrating thinner Si Wafers decreasing wafer cost by 20%.Coached and motivated engineering staff to develop new processes such as Ozone strip and Spray Acid technology which lead to cumulative yield increases from 86% to 92%Developed reporting process which prioritized 6 sigma processing and SPC chart monitoring to increase overall yield performance by 2%.Dallas SemiconductorDallas, TX PHONE NUMBER AVAILABLE/99 6/02Photolithography Engineering Manager 06/00 6/02Managed photolithography engineering area: up to 5 engineers, 10 technicians, responsible for hiring, firing, and the review cycle. Improved SPC for the department. Provided direction for process and equipment engineering; including enhancements, specifications, PMs and procedures. Responsible for cost analysis, forecasting, justifying and approving a chemical budget exceeding 1.35 million dollars. Qualified new chemicals and processes. Reviewed and approved all Standard Operating Procedures, technical reports, and process changes.Redesigned SOG process to realize a 43% cost reduction (and eliminated contamination scrap) through pricing contract negotiation, process enhancement, and chemical change.Instituted specification management for pilotless overlay for 0.35 and 0.6 um product lines: Increased product budget by 50%; reduced machine specifications 50% through SPC.Designed Chemical Resist plan for transitions to 0.35 product and 8 wafer line.Staff R&D Engineer (Senior) 08/99 06/00Responsibilities include directing photolithography process and equipment departments on maintenance and process characterizations/procedures for advanced technology products.Responsible for integrating pilotless production into manufacturing for 0.35 um technology.Designed and tested OPC (Optical Proximity Corrections) for tunnel gate technology.Corrected machine flaw to stepping stage to realize a 50% reduction in product variation.Instituted focus/tilt control methodology, which reduced tool variation by 30%.Qualified new contact hole resist increasing process latitude by 100%.Canon U.S.A. Inc.Irving, TX PHONE NUMBER AVAILABLE/96 08/99Applications Engineer II (Senior) 05/96 08/99Represented Canon with various customers, responding to technical application issues and concerns in an organized, timely fashion using project management solutions. Formulated and performed training presentations/demonstrations both internally and externally on application solutions to specific customer processing issues. Managed computer interface communication issues. Coordinated and performed acceptance testing of new steppers at the customer site; this includes lens characterization as well as resist characterization.Qualified DUV steppers at customer site. Organized DUV stepper acceptance schedules.Formulated, presented, & managed project to resolve customer complaint regarding machine model inferiority.Managed project to resolve file corruption dispute; demonstrating the customer converter driver as the source of the corruption instead of the Canon software.Texas Instruments IncorporatedDallas, TX PHONE NUMBER AVAILABLEProcess Engineer (Staff) 11/94 - 05/96Responsible for pattern alignment and critical dimension control; as well as reticle related issues for use in photolithography. This includes the acceptance and qualifications of related equipment. Negotiated specifications with other engineering organizations (Quality control, process, manufacturing, and product engineering groups, as well as purchasing/design customer groups). Scheduled, designed, and implemented action plans and experiments. Dispositioned problem lots; resolved various stepper related problems. Authored training manuals and SOPs.Worked with reticle team which maximized stepper field utilization through reticle design, increasing theoretical stepper PPH 50 percent and saving $12 million in capitalization costs.Improved reticle inspection capacity by 1000% through sample inspection system driven by various corrective actions: reduced handling, anti-static and particle control measures.Reduced CD measurement by 40 % through statistical data analysis.Supervisor (Photolithography) 6/93 - 11/94Supervised manufacturing line, responsible for 25 non-exempt direct reports. Reticle supervisor responsible for ten non-exempt direct reports. This newly formed position required the establishment of indices, goals, and measures of departmental success. Planned and directed the flow of material (wafers/reticles) in manufacturing (1000 wafers/day, 2500 masks/yr). Familiar with 5S, lean manufacturing, and good manufacturing principles; authored department SOPs.Designed and implemented a reticle retrieval system, which decreased the retrieval time by 90 percent (from approximately 3.5 minutes to 20 seconds).Reduced cycle time of reticle rework by 50 percent through vendor communication via weekly action/status meeting (reduced from 40 hrs. / reticle to 20 hrs. / reticle).Instituted a system of inventory management using early ERP systems for reticles based on Work In Progress in the manufacturing line leading to increased wafer throughput in a bottleneck area. Included ordering, inventory management and life cycle planning and tracking, budgeting and rework inclusive monitoring.International Business Machines (IBM)East Fishkill, NY PHONE NUMBER AVAILABLEProcess Engineer (Jr. Level - associate) 08/88 - 06/93Responsible for the surface finishing process for multi-layer ceramic packages (CMP or Chemical-mechanical polishing, lapping/polishing) which were sintered to form monolithic circuit boards. Developed and implemented new surface finishing processes; improved current processes through equipment improvements, implemented smart processes; created rework processes for scrapped material; and set specification changes with various engineering groups.Managed asset recovery project, developed a rework process and a logistics system which identified, tracked, and rerouted glass ceramic product through a rework system saving the company millions of dollars a year.Developed surface finishing process of alumina ceramic packages, which reduced the processing time by 80 percent resulting in a savings of $2.4 million annually.Implemented several new processes to improve efficiency including smart process which planarized the camber of alumina ceramic circuit boards using time based formulas based on surface topography of the monolithic substrate. Also applied to rework product to eliminate poor processing resulting in scrap due to double or overlapping via structures.Evaluated various abrasive table designs based on the geometric groove type applied to the table surface based on depth and geometric design including crosshatch, spiral groove, spiral tooth, and radial.Designed a DOE to evaluate various lapping variables such as pressure, groove depth and type, slurry feed.Evaluated various processes with department personnel to evaluate embossed CMP pads, perforated pads, and different pad hardness on ETN projects related to stripping surface metals from monolithic ceramic circuit boards. |
